What is the specification of a model to be followed during the design selection and initial?

1. Accellera Systems Initiative™: Core SystemC Language and Examples (2014). http://accellera.org/downloads/standards/systemc/files

2. Accellera Systems Initiative™: SystemC Synthesizable Subset – Version 1.4.7 (2016). http://accellera.org/images/downloads/standards/systemc/SystemC_Synthesis_Subset_1_4_7-Apache.pdf

3. aicas: Real-time specification for Java 2.0 (2016). https://www.aicas.com/cms/en/rtsj

4. Ambler, S.: Introduction to the diagrams of UML 2.X (2020). http://www.agilemodeling.com/essays/umlDiagrams.htm

5. ANSYS: Embedded software - embedded systems and software development (2020). https://www.ansys.com/products/embedded-software

6. Basten, T.: Opening remarks, 2nd Artist workshop on models of computation and communication, Eindhoven (2008). http://www.es.ele.tue.nl/~tbasten/mocc2008/presentations/mocc.pdf

7. Bengtsson, J., Yi, W.: Timed automata: Semantics, algorithms and tools. In: Desel, J., Reisig, W., Rozenberg, G. (eds.) Advanced Course on Petri Nets 2003. Lecture Notes in Computer Science, vol. 3098, pp. 87–124. Springer, Berlin (2004)

   Google Scholar 

8. Boldt, M., Traulsen, C., von Hanxleden, R.: Compilation and worst-case reaction time analysis for multithreaded esterel processing. EURASIP J. Embed. Syst. 2008, 4:1–4:21 (2008). https://doi.org/10.1155/2008/594129. http://dx.doi.org/10.1155/2008/594129

9. Bonfietti, A., Benini, L., Lombardi, M., Milano, M.: An efficient and complete approach for throughput-maximal SDF allocation and scheduling on multi-core platforms. In: Proceedings of Design, Automation and Test in Europe (DATE), pp. 897–902. European Design and Automation Association, 3001 Leuven, Belgium (2010). http://dl.acm.org/citation.cfm?id=1870926.1871143

10. Boussinot, F., de Simone, R.: The Esterel language. Proc. IEEE 79(9), 1293–1304 (1991)

    CrossRef  Google Scholar 

11. Bouwmeester, D., Ekert, A., Zeilinger, A. (eds.): The Physics of Quantum Information: Quantum Cryptography, Quantum Teleportation, Quantum Computation. Springer, Berlin (2000)

    MATH  Google Scholar 

12. Brand, D., Bergamaschi, R.A., Stok, L.: Don’t cares in synthesis: theoretical pitfalls and practical solutions. IEEE Trans. Comput. Aided Design Integr. Circuits Syst. 17(4), 285–304 (1998). https://doi.org/10.1109/43.703819

    CrossRef  Google Scholar 

13. Bryant, R.: A switch-level model and simulator for MOS digital circuits. IEEE Trans. Comput. 33, 160–177 (1984)

    CrossRef  MathSciNet  MATH  Google Scholar 

14. Buck, J.T.: Scheduling dynamic dataflow graphs with bounded memory using the token flow model. Ph.D. Thesis, University of California at Berkeley (1993)

    Google Scholar 

15. Budkowski, S., Dembinski, P.: An introduction to Estelle: A specification language for distributed systems. Comput. Netw. ISDN Syst. 14(1), 3–23 (1987). https://doi.org/10.1016/0169-7552(87)90084-5. http://www.sciencedirect.com/science/article/B6TYT-48V22NJ-5C/2/611631c58f275c04f464fba932b8b699

16. Burns, A., Wellings, A.: Real-Time Systems and Programming Languages. Addison-Wesley, Boston (1990)

    MATH  Google Scholar 

17. Burns, A., Wellings, A.: Real-Time Systems and Programming Languages, 4th edn. Addison Wesley, Boston (2009)

    MATH  Google Scholar 

18. Cai, L., Gajski, D.: Transaction level modeling: An overview. In: Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), pp. 19–24. ACM, New York (2003). https://doi.org/10.1145/944645.944651. http://doi.acm.org/10.1145/944645.944651

19. Chen, K., Sztipanovits, J., Neema, S.: Compositional specification of behavioral semantics. In: Design, Automation and Test in Europe (DATE), pp. 906–911 (2007)

    Google Scholar 

20. Cheung, E., Hsieh, H., Balarin, F.: Automatic buffer sizing for rate-constrained KPN applications on multiprocessor system-on-chip. In: High Level Design Validation and Test Workshop, 2007. HLVDT 2007. IEEE International, pp. 37–44 (2007). https://doi.org/10.1109/HLDVT.2007.4392782

21. Clouard, A., Jain, K., Ghenassia, F., Maillet-Contoz, L., Strassen, J.: Using transactional models in SoC design flow. In: Müller, W., Rosenstiel, W., Ruf, J. (eds.) SystemC: Methodologies and Applications, pp. 29–64. Kluwer Academic Publishers, Dordrecht (2003)

    Google Scholar 

22. Coelho, D.R.: The VHDL Handbook. Kluwer Academic Publishers, Dordrecht (1989)

    CrossRef  Google Scholar 

23. Damm, W., Harel, D.: LSCs: breathing life into message sequence charts. Form. Method Syst. Des. 19, 45–80 (2001)

    CrossRef  MATH  Google Scholar 

24. Davis, J., Hylands, C., Janneck, J., Lee, E.A., Liu, J., Liu, X., Neuendorffer, S., Sachs, S., Stewart, M., Vissers, K., Whitaker, P., Xiong, Y.: Overview of the Ptolemy project. Technical Memorandum UCB/ERL M01/11 (2001). http://ptolemy.eecs.berkeley.edu

25. Derin, O.: Self-adaptivity of applications on network on chip multiprocessors – the case of fault-tolerant Kahn Process Networks. Ph.D. Thesis, Università della Svizzera Italiana de Lugano (2013)

    Google Scholar 

26. Deutsches Institut für Normung: DIN 66253, Programmiersprache PEARL, Teil 2 PEARL 90. Beuth-Verlag, Berlin (1997). http://www.din.de

27. Dill, D., Alur, R.: A theory of timed automata. Theoret. Comput. Sci. 126, 183–235 (1994)

    CrossRef  MathSciNet  MATH  Google Scholar 

28. Douglass, B.P.: Real-Time UML, 3rd edn. Addison Wesley, Boston (2004)

    Google Scholar 

29. Drusinsky, D., Harel, D.: Using statecharts for hardware description and synthesis. IEEE Trans. Comput. Design 8, 798–807 (1989)

    CrossRef  Google Scholar 

30. Edwards, S.: Dataflow languages (2001). http://www.cs.columbia.edu/~sedwards/classes/2001/w4995-02/presentations/dataflow.ppt

31. Edwards, S.: Languages for embedded systems. In: Zurawski, R. (ed.) Embedded Systems Handbook. CRC Press, Boca Raton (2006)

    Google Scholar 

32. Esterel Technologies SA: Homepage (2014). http://www.esterel-technologies.com

33. Fowler, M., Scott, K.: UML Distilled: Applying the Standard Object Modeling Language. Addison-Wesley, Boston (1998)

    Google Scholar 

34. Gajski, D., Vahid, F., Narayan, S., Gong, J.: Specification and Design of Embedded Systems. Prentice Hall, Upper Saddle River (1994)

    Google Scholar 

35. Gajski, D., Zhu, J., Dömer, R., Gerstlauer, A., Zhao, S.: SpecC: Specification Language Methodology. Kluwer Academic Publishers, Dordrecht (2000)

    CrossRef  Google Scholar 

36. Gomez, L., Fernandes, J.: Behavioral Modeling for Embedded Systems and Technologies. IGI Global, Pennsylvania (2010)

    Google Scholar 

37. Grötker, T., Liao, S., Martin, G.: System Design with SystemC. Springer, Berlin (2002)

    Google Scholar 

38. Halbwachs, N.: Synchronous programming of reactive systems, a tutorial and commented bibliography. In: Tenth International Conference on Computer-Aided Verification, CAV’98, LNCS 1427. Springer, Berlin (1998). See also: http://www.springerlink.com/content/5127074271136j71/fulltext.pdf

39. Halbwachs, N.: Personal communication. South American Artist School on Embedded Systems, Florianopolis (2008)

    Google Scholar 

40. Halbwachs, N., Caspi, P., Raymond, P., Pilaud, D.: The synchronous dataflow language LUSTRE. Proc. IEEE Trans. Softw. Eng. 79, 1305–1320 (1991)

    Google Scholar 

41. Harel, D.: StateCharts: A visual formalism for complex systems. Sci.Comput. Program. 8, 231–274 (1987)

    CrossRef  MathSciNet  MATH  Google Scholar 

42. Haubelt, C., Teich, J.: Digital Hardware/Software-Systems: Specification and Verification (in German). eXamen.press. Springer, Berlin (2010). https://books.google.de/books?id=eNwfBAAAQBAJ

43. Haugen, O., Moller-Pedersen, B.: Introduction to UML and the modeling of embedded systems. In: Zurawski, R. (ed.) Embedded Systems Handbook. CRC Press, Boca Raton (2006)

    Google Scholar 

44. Hayes, J.: A unified switching theory with applications to VLSI design. Proc. IEEE 70, 1140–1151 (1982)

    CrossRef  Google Scholar 

45. Hennessy, J.L., Patterson, D.A.: Computer Architecture: A Quantitative Approach, 5th edn. Morgan Kaufmann, Burlington (2011)

    MATH  Google Scholar 

46. Herken, R.: The Universal Turing Machine: A Half-Century Survey. Springer, Berlin (1995)

    CrossRef  MATH  Google Scholar 

47. Herrera, F., Fernández, V., Sánchez, P., Villar, E.: Embedded software generation from SystemC for platform based design. In: Müller, W., Rosenstiel, W., Ruf, J. (eds.) SystemC: Methodologies and Applications, pp. 247–272. Kluwer Academic Publishers, Dordrecht (2003)

    Google Scholar 

48. Herrera, F., Posadas, H., Sánchez, P., Villar, E.: Systemic embedded software generation from SystemC. In: Proceedings of Design, Automation and Test in Europe (DATE), pp. 10142–10149 (2003)

    Google Scholar 

49. Hoare, C.: Communicating Sequential Processes. Prentice Hall International Series in Computer Science. Prentice-Hall, Upper Saddle River (1985)

    Google Scholar 

50. Hopcroft, J., Motwani, R., Ullman, J.D.: Introduction to Automata Theory, Languages, and Computation. Addison Wesley, Boston (2006)

    MATH  Google Scholar 

51. Huerlimann, D.: Opentrack home page (2016). http://www.opentrack.ch

52. IBM: What’s New in Rational Rhapsody 7.5.1 (2009). http://www.ibm.com/developerworks/rational/library/09/whatsnewinrationalrhapsody-7-5-1

53. IBM: Rational DOORS (2016). http://www-01.ibm.com/software/awdtools/doors/

54. IBM: IBM Rational StateMate 4.6 (2018). http://www.ibm.com/developerworks/rational/products/statemate/

55. IEC: IEC 60848 – GRAFCET specification language for sequential function charts (2002). https://webstore.iec.ch/publication/3684

56. IEEE: 1076-1987 - IEEE Standard VHDL Language Reference Manual (1987). http://standards.ieee.org/findstds/standard/1076-1987.html

57. IEEE: IEEE Graphic Symbols for Logic Functions Std 91a-1991 (1991). http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=27895

58. IEEE: 1076-1993 - IEEE Standard VHDL Language Reference Manual (1993). http://standards.ieee.org/findstds/standard/1076-1993.html

59. IEEE: 1076-2000 - IEEE Standard VHDL Language Reference Manual (2000). http://standards.ieee.org/findstds/standard/1076-2000.html

60. IEEE: 1076-2002 - IEEE Standard VHDL Language Reference Manual (2002). http://standards.ieee.org/findstds/standard/1076-2002.html

61. IEEE: 1076-2008 - IEEE Standard VHDL Language Reference Manual, pp. c1–626 (2009). http://standards.ieee.org/findstds/standard/1076-2008.html

62. IEEE: 1666-2011 - IEEE Standard for Standard SystemC Language Reference Manual (2011). https://ieeexplore.ieee.org/document/6134619

63. IEEE: 1800-2012 - IEEE Standard for SystemVerilog–Unified Hardware Design, Specification, and Verification Language (2012). https://standards.ieee.org/findstds/standard/1800-2012.html

64. IEEE: P1076.1-2017 - Standard VHDL Analog and Mixed-Signal Extensions (2017). http://standards.ieee.org/develop/project/1076.1.html

65. ISO/IEC: ISO/IEC 15437:2001 - Information technology – Enhancements to LOTOS (E-LOTOS) (2001). http://www.iso.org/iso/home/store/catalogue_tc/catalogue_detail.htm?csnumber=27680

66. Janka, R.: Specification and Design Methodology for Real-Time Embedded Systems. Kluwer Academic Publishers, Dordrecht (2002)

    CrossRef  MATH  Google Scholar 

67. Jantsch, A.: Modeling Embedded Systems and SoC’s: Concurrency and Time in Models of Computation. Morgan Kaufmann, Burlington (2004)

    Google Scholar 

68. Jantsch, A.: Models of embedded computation. In: Zurawski, R. (ed.) Embedded Systems Handbook. CRC Press, Boca Raton (2006)

    Google Scholar 

69. Java Community Process: JSR-1 – Real-time Specification for Java (2019). http://www.jcp.org/en/jsr/detail?id=1

70. Jensen, K.: Coloured Petri Nets: Basic Concepts, Analysis Methods and Practical Use, vol. 1. Springer, Berlin (2013)

    Google Scholar 

71. Kahn, G.: The semantics of a simple language for parallel programming. In: Proceeding of the International Federation for Information Processing (IFIP), pp. 471–475 (1974)

    Google Scholar 

72. Karp, R.M., Miller, R.E.: Properties of a model for parallel computations: Determinacy, termination, queueing. SIAM J. Appl. Math. 14, 1390–1411 (1966)

    CrossRef  MathSciNet  MATH  Google Scholar 

73. Kempe, M.: Ada 95 reference manual, ISO/IEC standard 8652 (1995). (HTML-version), http://www.adahome.com/rm95/

74. Kempe Software Capital Enterprises (KSCE): Ada home: The web site for Ada (2010). http://www.adahome.com

75. Kienhuis, B., Rijjpkema, E., Deprettere, E.: Compaan: Deriving process networks from Matlab for embedded signal processing architectures. In: Proceedings of the International Symposium on Hardware-Software Codesign (CODES), pp. 29–40 (2000)

    Google Scholar 

76. Ko, M., Koo, I.: An overview of interactive video on demand system (1996). www.ece.ubc.ca/~irenek/techpaps/vod/vod.html

77. Kobryn, C.: UML 2001: A standardization Odyssey. Communications of the ACM (CACM), pp. 29–36 (2001). Available at http://www.omg.org/attachments/pdf/UML_2001_CACM_Oct99_p29-Kobryn.pdf

78. Kohavi, Z., Jha, N.K.: Switching and Finite Automata Theory, 3rd edn. Cambridge University Press, Cambridge (2010)

    MATH  Google Scholar 

79. Lee, E.A., Messerschmitt, D.: Synchronous data flow. Proc. IEEE 75, 1235–1245 (1987)

    CrossRef  Google Scholar 

80. Lee, E.A.: Embedded software – an agenda for research. Technical Report, UCB ERL Memorandum M99/63 (1999)

    Google Scholar 

81. Lee, E.A.: Absolutely positively on time. IEEE Comput. 38, 85–87 (2005)

    CrossRef  Google Scholar 

82. Lee, E.A.: The future of embedded software. ARTEMIS Conference, Graz (2006). http://ptolemy.eecs.berkeley.edu/presentations/06/FutureOfEmbeddedSoftware_Lee_Graz.ppt

83. Lewis, J., Rashba, E., Brophy, D.: VHDL-2006-D3.0 Tutorial. Tutorial at Design, Automation, and Test in Europe (DATE) (2007). http://www.accellera.org/apps/group_public/download.php/934/date_vhdl_tutorial.pdf

84. Liu, J.W.: Real-Time Systems. Prentice Hall, Upper Saddle River (2000)

    Google Scholar 

85. Marian, N., Ma, Y.: Translation of Simulink models to component-based software models. In: 8th International Workshop on Research and Education in Mechatronics REM, pp. 262–267 (2007). http://seg.mci.sdu.dk/publications/Translation%20of%20Simulink%20Models%20to%20Component-based%20Software%20Models.pdf

86. Marongiu, A., Benini, L.: Efficient OpenMP support and extensions for MPSoCs with explicitly managed memory hierarchy. In: Proceedings of Design, Automation and Test in Europe (DATE), pp. 809–814 (2009)

    Google Scholar 

87. Martin, G., Müller, W. (eds.): UML™ for SOC Design. Springer, Berlin (2010)

    Google Scholar 

88. Marwedel, P.: MIMOLA—a fully synthesizable language. In: Mishra, P., Dutt, N. (eds.) Processor Description Languages: Applications and Methodologies, pp. 35–63. Morgan Kaufmann, Burlington (2008)

    CrossRef  Google Scholar 

89. Marwedel, P., Schenk, W.: Cooperation of synthesis, retargetable code generation and test generation in the MSS. In: Proceedings of the European Design Automation Conference (Euro-DAC), pp. 63–69 (1993)

    Google Scholar 

90. MathWorks, T.: Stateflow (2020). https://www.mathworks.com/products/stateflow.html

91. McLaughlin, M., Moore, A.: Real-Time Extensions to UML (1998). http://www.ddj.com/184410749

92. Mermet, J., Marwedel, P., Ramming, F.J., Newton, C., Borrione, D., Lefaou, C.: Three decades of hardware description languages in Europe. J. Electri. Eng. Inform. Sci. 3, 106pp (1998)

    Google Scholar 

93. Merriam-Webster Inc.: Dictionary, Entry for “Task” (2020). https://www.merriam-webster.com/dictionary/task

94. Message Passing Interface Forum: MPI: A message-passing interface standard - version 3.1 (2015). http://www.mpi-forum.org/docs/mpi-3.1/mpi31-report.pdf

95. Modelica Association: Modelica® - A Unified Object-Oriented Language for Systems Modeling - Language Specification - Version 3.3 (2012). https://www.modelica.org/documents/ModelicaSpec33.pdf

96. Montoreano, M.: Transaction level modeling using OSCI TLM 2.0 (2007). http://accellera.org/images/downloads/standards/systemc/systemc-2.3.1.tgz

97. Müller, W., Rosenstiel, W., Ruf, J.: SystemC: Methodologies and Applications. Kluwer Academic Publishers, Dordrecht (2003)

    MATH  Google Scholar 

98. Nicolescu, G., Mosterman, P.J.: Model-Based Design for Embedded System. CRC Press, Boca Raton (2010)

    Google Scholar 

99. Object Management Group (OMG): UML™ profile for schedulability, performance, and time specification, version 1.1 (2005). http://www.omg.org/cgi-bin/doc?formal/05-01-02.pdf

100. Object Management Group (OMG): A UML™ profile for MARTE: Modeling and analysis of real-time embedded systems - 1.0 (2009). http://www.omg.org/spec/MARTE/1.0/PDF

101. Object Management Group (OMG): OMG® Specifications (2016). http://www.omg.org/spec/

102. Object Management Group (OMG): Unified modeling language™ resource page (2016). http://www.uml.org

103. Object Management Group (OMG): Systems modeling language (SysML™) (2020). https://www.omg.org/technology/readingroom/System-Modeling-Language.htm

104. Occam user group: Transputer and occam bibliography (1990). http://www.transputer.net/obooks/oug/oug-bib.pdf

105. OpenMP Architecture Review Board: OpenMP application program interface (2008). http://www.openmp.org/mp-documents/spec30.pdf

106. Petri, C.A.: Kommunikation mit Automaten. Schriften des Rheinisch-Westfälischen Institutes für Instrumentelle Mathematik an der Universität Bonn (1962)

     Google Scholar 

107. Popovici, K., Rousseau, F., Jerraya, A.A., Wolf, M.: Embedded Software Design and Programming of Multiprocessor System-on-Chip. Springer, Berlin (2010)

     CrossRef  MATH  Google Scholar 

108. Potop-Butucaru, D., de Simone, R., Talpin, J.P.: The synchronous hypothesis and synchronous languages. In: Zurawski, R. (ed.) Embedded Systems Handbook. CRC Press, Boca Raton (2006)

     Google Scholar 

109. Ptolemaeus, C. (ed.): System Design, Modeling, and Simulation using Ptolemy II. Ptolemy.org (2014). http://ptolemy.org/books/Systems

110. Radetzki, M. (ed.): Languages for Embedded Systems and their Applications. Springer, Berlin (2009)

     MATH  Google Scholar 

111. Reisig, W.: Understanding Petri Nets: Modeling Techniques, Analysis Methods, Case Studies. Springer, Berlin (2013)

     Google Scholar 

112. Riccobene, E., Scandurra, P., Rosti, A., Bocchio, S.: A UML™ 2.0 profile for SystemC: toward high-level SoC design. In: Proceedings of the International Conference on Embedded Software (EMSOFT), pp. 138–141 (2005). http://doi.acm.org/10.1145/1086228.1086254

113. Sangiovanni-Vincentelli, A., Zeng, H., Natale, M.D., Marwedel, P. (eds.): Embedded Systems Development - From Functional Methods to Implementations. Springer, Berlin (2013). ISBN 978-1-4616-3878-6

     Google Scholar 

114. Schneider, K.: The synchronous programming language Quartz. Technical Report, Internal Report 375, Department of Computer Science, University of Kaiserslautern, Kaiserslautern (2009)

     Google Scholar 

115. SDL Forum Society: Home page (2016). http://www.sdl-forum.org

116. SDL Forum Society: List of commercial tools (2016). http://www.sdl-forum.org/Tools/Commercial.htm

117. Siemens: SIMATIC STEP 7 Programming Software (2016). http://www.automation.siemens.com/simatic/industriesoftware/html_76/products/step7.htm

118. Sifakis, J.: A notion of expressiveness for component-based design. In: Workshop on Foundations and Applications of Component-based Design, ES-Week (2008). http://www.artist-embedded.org/docs/Events/2008/Components/SLIDES/12-JosephSifakis-WFCD-ArtistDesign-Oct192008.pdf

119. Sipser, M.: Introduction to the Theory of Computation. Thomson Course Technology, Parts One and Two, Boston (2006)

     Google Scholar 

120. Sirocic, B., Marwedel, P.: Levi KPN simulation software (2007). https://ls12-www.cs.tu-dortmund.de/daes/media/documents/teaching/downloads/levi/download/leviKPN.zip

121. Sirocic, B., Marwedel, P.: Levi TDD simulation software (2007). https://ls12-www.cs.tu-dortmund.de/daes/media/documents/teaching/downloads/levi/download/leviTDD.zip

122. Skjellum, A., Kanevsky, A., Dandass, Y.S., Watts, J., Paavola, S., Cottel, D., Henley, G., Hebert, L.S., Cui, Z., Rounbehler, A.: The real-time message passing interface standard (MPI/RT-1.1). Concurr. Comput. Practice Exp. 16(S1), Si–S322 (2004). https://doi.org/10.1002/cpe.744. http://dx.doi.org/10.1002/cpe.744

123. Spivey, M.: The Z Notation: A Reference Manual, 2nd edn. Prentice Hall International Series in Computer Science. Prentice Hall, Upper Saddle River (1992)

     Google Scholar 

124. Sprint Consortium: Open SoC design platform for reuse and integration of IPs (2008). http://ecsi.org/sprint

125. Stallings, W.: Operating Systems: Internals and Design Principles, 8 edn. Prentice Hall, Upper Saddle River (2015)

     Google Scholar 

126. Stuijk, S.: Predictable mapping of streaming applications on multiprocessors. Ph.D. Thesis, TU Eindhoven (2007)

     Google Scholar 

127. Sutherland, S.: An overview of SystemVerilog 3.1. EEdesign, May (2003). Available at http://www.eetimes.com/news/design/features/showArticle.jhtml?articleID=16501063

128. SystemC: Home page (2016). http://www.SystemC.org

129. Tanenbaum, A.: Modern Operating Systems. Prentice Hall, Upper Saddle River (2014)

     Google Scholar 

130. Tewari, A.: Modern Control Design with MATLAB and SIMULINK. Wiley, Hoboken (2001)

     Google Scholar 

131. The MathWorks Inc.: Simulink - simulation and model-based design (2016). http://www.mathworks.com/products/simulink

132. Thoen, F., Catthoor, F.: Modelling, Verification and Exploration of Task-Level Concurrency in Real-Time Embedded Systems. Kluwer Academic Publishers, Dordrecht (2000)

     Google Scholar 

133. Thomas, D.E., Moorby, P.: The Verilog Hardware Description Language. Kluwer Academic Publishers, Dordrecht (1991)

     CrossRef  MATH  Google Scholar 

134. Tiller, M.M.: Modelica by Example (2016). http://book.xogeny.com/

135. Tomasulo, R.M.: An efficient algorithm for exploiting multiple arithmetic units. IBM J. Res. Dev. 11(1), 25–33 (1967). https://doi.org/10.1147/rd.111.0025

     CrossRef  MATH  Google Scholar 

136. Verachtert, W.: Introduction to parallelism. In: Tutorial at Design, Automation, and Test in Europe (DATE). Springer, Berlin (2008)

     Google Scholar 

137. Vladimirescu, A.: SPICE user’s guide. Northwest Laboratory for Integrated Systems, Seattle (1987)

     Google Scholar 

138. Wang, C., Li, X., Zhang, J., Zhou, X., Nie, X.: MP-Tomasulo: a dependency-aware automatic parallel execution engine for sequential programs. ACM Trans. Archit. Code Optim. 10(2), 9:1–9:26 (2013). https://doi.org/10.1145/2459316.2459320. http://doi.acm.org/10.1145/2459316.2459320

139. Waxman, R., Bergé, J.M., Levia, O., Rouillard, J.: High-Level System Modeling. Springer, Berlin (1996)

     CrossRef  MATH  Google Scholar 

140. Wegener, I.: Branching Programs and Binary Decision Diagrams: Theory and Applications. SIAM Monographs on Discrete Mathematics and Applications. Society for Industrial and Applied Mathematics, Philadelphia (2000)

     CrossRef  MATH  Google Scholar 

141. Wikipedia: Structured systems analysis and design method (2020). http://en.wikipedia.org/wiki/Structured_Systems_Analysis_and_Design_Methodology

142. Wikipedia: Zeno’s paradoxes (2020). https://en.wikipedia.org/wiki/Zeno's_paradoxes#Achilles_and_the_tortoise

143. Winkler, J.: The CHILL homepage (2002). http://psc.informatik.uni-jena.de/languages/chill/chill.htm

144. XMOS Ltd.: Home page (2016). http://www.xmos.com/

Page 2

From: Specifications and Modeling

1. aThe classification of VHDL, Verilog, and SystemC is based on the implementation of these languages in simulators. Message passing can be modeled in these languages “on top” of the simulation kernel